Vectored interrupt

In computer science, a vectored interrupt is a processing technique in which the interrupting device directs the processor to the appropriate interrupt service routine. This is in contrast to a polled interrupt system, in which a single interrupt service routine must determine the source of the interrupt by checking all potential interrupt sources, a slow and relatively laborious process. Vectored interrupts are achieved by assigning each interrupting device a unique code, typically four to eight bits in length.^[1] When a device's interrupt is acknowledged, the device sends its unique code over the data bus to the processor, telling the processor which interrupt service routine to execute.

Vectored interrupts are often implemented in microprocessors. Even the very first commercially-available 8-bit microprocessor, the Intel 8008 from 1971, supported at least seven vectors, though curiously it had no capability to save its state during an interrupt. Here are a few examples of vectored interrupts as implemented on microprocessors:

The Intel 8080 from 1974 can support seven vectors with little hardware or up to 64 vectors using the Intel 8259.

The minimal hardware method requires the external hardware to jam a single-byte RST (restart) instruction associated with the interrupting device onto the bus. The restart instruction is a call to one of eight locations: 0, 8, 16, 24, 32, 40, 48, and 56, allowing seven directly-accessible interrupt service routines. (Location 0 may not be usable as it is shared with reset.)^[2]

When using an Intel 8259, a CALL instruction can be issued instead of RST allowing the interrupt to be sent to any place in memory. Up to nine 8259s can be cascaded to allow up to 64 vectors.^[3]

The Zilog Z80 from 1976 supports the 8080's interrupt methods and adds a couple of its own. In mode 2, the Z80 supports 128 vectors. The Z80 I register supplies the high byte of the base address for an 128-entry table of service routine addresses. The interrupting device provides the low byte of its specific table entry. The Z80 pushes the program counter (PC) then forms an address using these two bytes to load the interrupt service routine address into PC, causing a jump.^[4]

The WD16 from 1976 supports 16 interrupt vectors. When a vectored interrupt is received, processor status and program counter (PC) are pushed. During interrupt acknowledge, the WD16 accepts a four-bit interrupt number provided by the interrupting device. The interrupt vector table address is fetched from memory location 0x0028 and the interrupt number is added to it, pointing to one of 16 words in the table. A word offset is fetched from the table and added to its own table address. The result is loaded into PC causing a jump to the interrupt service routine.^[5]

Intel 8086 from 1978 supports 256 interrupt vectors. Interrupts are long calls that also save the processor status. All interrupts have a 8-bit interrupt number associated with them. This number is used to look up a segment:offset in a 256 element interrupt vector table stored at addresses 0-0x3FF. When any type of interrupt is encountered, the processor status is pushed, CS and IP are pushed, and the interrupt number is multiplied by four to index a new execution address which is loaded from the vector table. Interrupt routines typically end with a IRET instruction.^[6][3]